US Patent 8154010 - PN nanotube network crossbar memory

http://www.freepatentsonline.com/8154010.html

This patent from Hynix Semiconductor teaches how to form a memory array using p-doped and n-doped nanotube networks as a future replacement for DRAM. Claim 1 reads:

1. A memory device having a crossbar structure, the memory device comprising:

a plurality of first electrodes arranged in parallel and extending in a first direction;

a plurality of second electrodes arranged in parallel, spaced apart from the first electrodes, and extending in a second direction intersecting the first direction; and

a first nanotube or nanowire network disposed at each intersection of the first electrodes and the second electrodes, including a stacked structure of a P-type network and an N-type network, and having a diode characteristic, the stacked structure comprising an upper portion, a lower portion, and a heterojunction defined between the upper portion and the lower portion, one of the upper or lower portions being the P-type network, and the other one of the upper or the lower portions being the N-type network, wherein each of the first electrodes is connected to one of the P-type network and the N-type network and each of the second electrodes is connected to the other of the P-type network and the N-type network.

US Patent 8148708 - Memresistor with CNT selection diode

http://www.freepatentsonline.com/8148708.html

In ReRAM devices the problem of current sneak paths limits the size of memory cell arrays. There have been suggestions of using metal oxide materials to improve non-linearity and avoid sneak paths but these materials reduce current density. This patent from Hynix Semiconductor teaches using carbon nanotubes as an alternative to produce rectifying characteristics without reducing current density. Claim 1 reads:

1. A resistive memory cell, comprising:

a first conductive line on a substrate;

a selection diode comprising a vertical nanotube and being arranged over the first conductive line;

a resistive element including a resistive layer arranged over the selection diode; and

a second conductive line arranged over the resistive element;

wherein the vertical nanotube includes a carbon nanotube.

US Patent 8113437 - Memresistor RFID

http://www.freepatentsonline.com/8113437.html

There is currently a collaboration between Hewlett Packard and Hynix Semiconductor to produce a ReRAM product by 2013 (which they are incorrectly calling a memristor). This patent may be indicative that the first product may be related to RFID technology. Claim 1 reads:

1. A radio frequency identification (RFID) device comprising:

a radio signal transceiver configured to transmit/receive a radio signal to/from an external reader;

a digital unit configured to detect a command signal from an output of the radio signal transceiver and output a control signal corresponding to the command signal; and

a memory unit that includes a resistive switch device (RSD) having memristor characteristics and that is configured to perform a data read or write operation in response to the control signal and to write data in the resistive switch device depending on a voltage difference between a bit line and a cell plate line,

wherein the resistive switch device is coupled to the bit line and the cell plate line and a voltage level of the cell plate line changes according to a logic state of the data.

US Patent 7939404 - Nanowire capacitor grown from graphene mask

http://www.freepatentsonline.com/7939404.html

Further scalability of DRAM memory to the nanoscale may require the use of capacitors formed from carbon nanotubes or nanowires. This patent from Hynix Semiconductor teaches a way to achieve this using graphene based masks. Claim 1 reads:

1. A method for making a capacitor of a semiconductor device, the method comprising:

forming a graphene seed film over a substrate;

performing a first plasma process on the graphene seed;

growing a graphene on the graphene seed film;

growing a nano tube or a nano wire using the graphene as a mask; and

sequentially forming a dielectric film and a conductive layer over the nano tube or the nano wire, wherein the nano tub or the nano wire, the dielectric film, and the conductive layer define the capacitor.

US Patent 7732316 - Controlled fabrication of vertical CNTFETs

http://www.freepatentsonline.com/7732316.html

This patent is from Hynix Semiconductor and teaches a fabrication process for carbon nanotube transistors which may increase reliability during mass production. Claim 1 reads:

1. A manufacturing method of a semiconductor device, the method comprising:

forming a layer comprising a plurality of hemispherical single crystal silicon elements over a semiconductor substrate;

forming one or more carbon nano tubes between adjacent hemispherical single crystal silicon elements;

forming a gate insulating layer over the hemispherical single crystal silicon elements, the semiconductor substrate, and the carbon nano tubes; and forming a gate material layer over the gate insulating layer.

US Patent 7688570 - Nanotube enhanced silicon capacitor

http://www.freepatentsonline.com/7688570.html

Dynamic random access memory (DRAM) is a form of semiconductor memory which uses capacitor structures to store data. However, the scaling of DRAM reduces the capacitance values making it difficult to provide reliable storage. This patent from Hynix Semiconductor teaches using nanotubes in the capacitor structure to increase the surface area and capacitance of DRAM memory cells. Claim 1 reads:

1. A capacitor, comprising:

a lower electrode including a patterned conductive layer and a plurality of nanotubes formed on the patterned conductive layer without using a catalytic layer;

a dielectric layer formed on the lower electrode; and

an upper electrode formed on the dielectric layer, wherein the patterned conductive layer is formed of a silicon layer.

US Patent 7463476 - Non-catalytic CNT capacitor fabrication

http://www.freepatentsonline.com/7463476.html

Decreasing the size of memory cells has led to decreasing capacitances which are undesirable for scaling. High aspect ratio structures such as carbon nanotubes with large surface areas offer one potential solution. In the past nanotubes have been grown for such an application using a catalytic transition metal such as Fe, Co, or Ni. However, this patent from Hynix Semiconductor teaches an alternative fabrication approach that does not require a catalyst based on a "metastable polysilicon" process developed by Hynix. Claim 1 reads:

1. A method for fabricating a capacitor, comprising the steps of:

forming a conductive layer for forming a lower electrode;

forming a nanotube array including a plurality of nanotubes formed on the conductive layer without using a catalytic layer;

forming a dielectric layer on the nanotube array; and

forming an upper electrode on the dielectric layer.

US Patent 7446053 - Multilayer nanocomposite capacitor

http://www.freepatentsonline.com/7446053.html

This patent from Hynix Semiconductor teaches forming a capacitor using a ZrO2/TiO2 multilayer nanocomposite material as the dielectric to reduce leakage current in highly integrated semiconductor devices. Claim 1 reads:

1. A method for fabricating a capacitor, comprising:

forming a lower electrode; forming a nano-composite layer over the lower electrode by mixing X number of different sub-layers, where X is a positive integer greater than approximately 1;

densifying the nano-composite layer; and

forming an upper electrode layer over the nano-composite layer.