US Patent 7276172 - Nanowire crossbar fabrication using nucleic acid block copolymers

http://www.freepatentsonline.com/7276172.html

A primary advantages of nanowire crossbar arrays, which are being proposed for high density memory and computational devices, is that they are based on regular, periodic structures. This patent from Sony uses co-polymer self assembly, which is very good at establishing such periodic structures, to form nanowire crossbars. Claim 1 reads:

1. A method for preparing a nanowire crossbar structure, comprising: forming a composite structure on a substrate, the composite structure comprising a nucleic acid-block copolymer having equidistant nucleic acid-catalyst binding sites and at least one catalyst nanoparticle functionalized to bind specifically to at least one of the nucleic acid-catalyst binding sites; and growing at least one nanowire from the at least one catalyst nanoparticle as part of the nanowire crossbar structure; wherein: the substrate is etched to form grooves for receiving nanowires prior to forming the composite structure on the substrate; and the grooves are formed to a diameter of from about 2 nm to about 40 nm.

US Patent 7274998 - Near-field photolithography using nano-LEDs

http://www.freepatentsonline.com/7274998.html

This patent from Intel presents a very interesting alternative to conventional optical lithography that employs a nanowire crossbar arrays of intersecting p-doped and n-doped nanowires. The intersections of the nanowires form light emitting diodes which may be used to pattern a resist of a substrate at nanoscale dimensions. The device acts as a sort of programmable mask which may save a great amount of cost in high resolution semiconductor manufacture. Interestingly this device uses a nanowire crossbar as a major component for implementation which is similar to the nanoscale crossbar used by HP in constructing high density memory and logic devices. Claim 1 reads:

1. An apparatus comprising: an array of nanowires placed at a distance to a resist layer, the array forming a plurality of light emitting diodes (LEDs), the distance corresponding to a near field region of light emitted by the LEDs with respect to the resist layer; and a control circuit coupled to the array to control the LEDs to emit the light to pattern a feature in the resist layer.

US Patent 7274208 - Nanoscale crossbars for programmable logic arrays

http://www.freepatentsonline.com/7274208.html

There is some interest in using nanoscale crossbars as elements in programmable logic devices. This patent from CalTech research Andre DeHon claims several configurations for nanoscale crossbars used in PLA designs. Claim 1 reads:

1. A programmable logic array (PLA) comprising: a first plurality of nanoscale wires forming PLA inputs; and a restoring inverting arrangement connected with the PLA inputs, comprising a second plurality of nanoscale wires, the restoring inverting arrangement restoring signals on the PLA inputs and inverting the signals on the PLA inputs.

US Patent 7256435 - Multidimensional nanowire crossbar interface

http://www.freepatentsonline.com/7256435.html

While nanoscale crossbar configurations are one of the leading candidates for future nanoelectronics, current efforts are focused on interconnecting these devices with more conventional electronic devices to enable near term applications. This patent teaches forming connection nanowires on a substrate to have a greater thickness than the other nanowires so that microwires can electrically contact the thick nanowires without interfering with the thin nanowires. Claim 9 reads:

9. An array of approximately parallel nanowires, each nanowire oriented in an X direction having (1) micro dimensions in the X direction, (2) nano dimensions and nano spacing in a Y direction, and at least two distinct heights in a Z direction, the X and Y directions parallel to a surface of a substrate underlying the array of approximately parallel nanowires, and the Z direction normal to the substrate surface, each of said nanowires, selectively making contact with portions of microscopic regions of microscopic wires or pads.

US Patent 7254799 - Nanowire crossbar optimization using graph theory

http://www.freepatentsonline.com/7254799.html

Nanoscale crossbars are a leading contender for a breakthrough platform for nanoelectronics and has a variety of potential advantages in addition to scaling such as reduced manufacturing cost and the capability of reconfigurability. However there are also some drawbacks including a relatively large percentage of defects. This patent from Hewlett-Packard teaches using graph theory to effectively allocate the working crosspoints. Claim 1 reads:

1. A method for allocating nanowire junctions in a nanowire crossbar, the method comprising: receiving a circuit; receiving a nanowire crossbar having one or more randomly distributed non-functional nanowire junctions; constructing a circuit graph based on the circuit; constructing a crossbar graph based on the nanowire crossbar; searching for a graph monomorphism based on the circuit graph and the crossbar graph; and allocating nanowire junctions of the nanowire crossbar based on the graph monomorphism.

US Patent 7242601- Microscale to nanoscale memory addressing

http://www.freepatentsonline.com/7242601.html

A variety of memory and logic systems are currently being developed by companies such as Hewlett packard and Nantero using nanoscale crossbars. One difficulty in working with nanoscale crossbars is addressing the nanowires using microscale wires. Andre DeHon is an inventor at CalTech working on realizing a variety of solutions to this problem. This solution uses a particular coding system for microscale to nanoscale wiring interfaces. Claim 1 reads:

1. A method for addressing a memory comprising: selecting a nanoscale wire from a plurality of nanoscale wires through a first set of microscale inputs; associating a code to the selected nanoscale wire through a second set of microscale inputs; repeating the selecting and associating steps in accordance with a number of nanoscale wires to be programmed; associating memory addresses of the memory to codes associated with the selected nanoscale wires; and selecting memory addresses of the memory by means of the second set of microscale inputs.

US Patent 7242215 - Nanoscale hysteretic resistor latch

http://www.freepatentsonline.com/7242215.html

The term "hysteresis" is most often used in reference to magnetic materials and generally refers to an effect lagging cause phenomena useful for data storage. However, various companies including HP, Micron Technologies, Ovonics, etc. are working on using molecular, polymer, or chalcogenide-based materials to achieve hysteresis of electrical resistance as well. These materials are useful in creating a variety of switching and logic devices and may be integrated in nanowire based electronic structures using printing based fabrication that can be far cheaper than the standard fab methods used in electronics. As more companies begin to be attracted to these materials it is possible that hysteretic resistance materials may one day rival semiconductors as the leading material in electronics. This patent from HP teaches a basic latching circuit using hysteretic resistance materials.

1. A nanoscale latch that stores a logical value, the nanoscale latch comprising: a nanoscale control-voltage input line; a nanoscale input/output signal line; and a nanoscale hysteretic resistor linking the control-voltage input to the input/output signal line that represents a first logic value when in a low-impedance, closed state and that represents a second logic value when in a high-impedance.

US Patents 7227379 and 7228518 - Nanowire crossbar arrays

Of all of the different approaches to nanoelectronic architectures I've come across the approach taken by Hewlett Packard (nanowire crossbar arrays) seems the most likely to have a substantial impact in the next 5-10 years. Some of the advantages of HPs approach are as follows:

1) Many of the proposed implementations of nanowire crossbars complement rather than attempt to replace more conventional electronics. Hybrid systems based on HP's nanowire crossbars such as CMOL (combining CMOS and molecular electronics) are in the works. This can facilitate a less disruptive, and thus more easily acceptable, electronics platform on which molecular based electronics may flourish.

2) The manufacturing of these devices are fairly cost effective since they are based on regular, periodic structures and complex patterning is not necessary. HP has advanced technologies such as nanoimprint lithography which provide for cheaper avenues of fabrication than the traditional EUV lithography and the capability of process scaling for mass production. HP is also supporting or working with other smaller companies to promote the use of nanoimprint lithography.

3) HP is creating a learning base based on applications in high-density resistive memory which may be applied to niche applications controlled by HP such as the non-volatile memorys used in inkjet print cartridges. The lessons learned in nanowire crossbar memory devices will undoubtably pay off as applications in nanowire crossbar processors come into fruition.

4) The nanowire crossbar architectures presents new capabilities beyond what is offered by silicon by providing the ability to form electronics on flexible (e.g. plastic) substrates and by allowing for reconfigurability (allowing for circuit self-repair and ease of integration with adaptive electronic systems such as FPGAs).

These are two of the most recent patents and representative claims from HP on this technology-one dealing with the creation of 1 bit register arrays and the other on how multilevel nanowire crossbar arrays may be formed by folding the substrate on which the nanowires are placed.

http://www.freepatentsonline.com/7227379.html

1. A nanoscale computing engine comprising: a nanowire data bus; a plurality of nanoscale registers interconnected by the nanowire data bus, each nanoscale register driven by a nanoscale control line; and primitive operations, each primitive operation composed of one or more inputs to one or more of the nanowire data bus and nanoscale control lines, that provide for transfer of information from an external source to a specified nanoscale register, transfer of information from a nanoscale register source to an external target, and transfer of information from a first nanoscale register to a second nanoscale register.

http://www.freepatentsonline.com/7228518.html

1. A method for obtaining a multilayer nanowire-crossbar design that is functionally equivalent to a two-layer nanowire crossbars design, the method comprising: receiving the two-layer nanowire-crossbar design having two or more microregions; folding the two-layer nanowire-crossbar design between the two or more microregions; and collapsing folded nanowires into single nanowires, which yields the multilayer nanowire-crossbar design.