Thursday, December 31, 2009

US Patent 7639524 - Dougle gate CNT memory

In order to continue transistor scaling in the next decade there are several approaches to using multi-gate transistors which can suppress leakage current and require less power for nanoscale circuit designs. This patent from Samsung teaches a double gate transistor using a nanotube channel which provides multi-bit nonvolatile data storage. Claim 1 reads:

1. A memory device comprising:

a channel formed of at least one carbon nanotube;

a source and a drain arranged at respective ends of the channel, the source and drain contacting terminal ends of the carbon nanotube; a first storage node formed under the channel;

a second storage node formed on the channel;

a first gate electrode formed under the first storage node; and

a second gate electrode formed on the second storage node, wherein the memory device is configured to write and erase using Fowler-Nordheim tunneling.