US Patent 7609086 - Mem-resistor transfer function circuitry
http://www.freepatentsonline.com/7609086.html
Adaptive control circuitry is important for electrical control systems which are required to respond to unpredictable changes in the environment or changes in the system requirements. However, when conventional processors are used to perform adaptive control the processor speed can limit responsiveness of the system to changing conditions. Memory resistors have been proposed as a nanoscale circuit element which offers an alternative to conventional processor based adaptive control by integrating memory storage with signal flow control. This patent teaches mem-resistor junctions integrated into a crossbar circuit architecture to provide a new type of parallel processing adaptive control. Claim 1 reads:
1. A control circuit including:
a crossbar array having input columns and output rows configured to store first stored data in the form of high or low resistance states,
wherein the input columns are connected to a common electrical input having an input voltage signal and the output rows are connected to a common summing circuit configured to sum signals from the rows to produce an output voltage signal,
wherein the control circuit is configured to produce a transfer function based on the ratio of the output voltage signal to the input voltage signal which is determined by the resistance states of the crossbar array.
Adaptive control circuitry is important for electrical control systems which are required to respond to unpredictable changes in the environment or changes in the system requirements. However, when conventional processors are used to perform adaptive control the processor speed can limit responsiveness of the system to changing conditions. Memory resistors have been proposed as a nanoscale circuit element which offers an alternative to conventional processor based adaptive control by integrating memory storage with signal flow control. This patent teaches mem-resistor junctions integrated into a crossbar circuit architecture to provide a new type of parallel processing adaptive control. Claim 1 reads:
1. A control circuit including:
a crossbar array having input columns and output rows configured to store first stored data in the form of high or low resistance states,
wherein the input columns are connected to a common electrical input having an input voltage signal and the output rows are connected to a common summing circuit configured to sum signals from the rows to produce an output voltage signal,
wherein the control circuit is configured to produce a transfer function based on the ratio of the output voltage signal to the input voltage signal which is determined by the resistance states of the crossbar array.
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