US Patent 7482652 - Triple walled carbon nanotube memory cell

http://www.freepatentsonline.com/7482652.html

Carbon nanotube transistor design has been gradually developing over the past decade but has largely been based on single walled nanotubes some of which possess semiconductive properties but are difficult to separate from conductive nanotubes. This patent from IBM teaches manufacturing a transistor design based on a multiwall tube. Claim 1 reads:

1. A method of forming a carbon nanotube structure comprising:

forming a set of three concentric carbon nanotubes on a substrate, said set including:

an inner carbon nanotube having a first diameter;

a middle carbon nanotube having a second diameter, wherein said second diameter is greater than said first diameter; and

an outer carbon nanotube having a third diameter, wherein said third diameter is greater than said second diameter;

cutting said outer carbon nanotube and said middle carbon nanotube, wherein said middle carbon nanotube and said outer carbon nanotube have a same length and two vertically coincident pairs of edges after said cutting, and wherein said inner carbon nanotube protrudes out from each of said two vertically coincident pairs of edges;

forming a protective dielectric layer over said substrate and said set of three concentric carbon nanotubes;

patterning said protective dielectric layer to expose two end portions of said inner carbon nanotube;

forming a conductive gate contact structure directly on said outer carbon nanotube; and

forming a conductive source side contact structure directly on one side of said inner carbon nanotube and forming a conductive drain side contact structure directly on another side of said inner carbon nanotube, wherein said conductive source side contact structure and said drain side contact structure are formed directly on said two end portions of said inner carbon nanotube.