US Patent 7411241 - Vertical nanotube transistor memory cell
http://www.freepatentsonline.com/7411241.html
This patent from Samsung with priority going back to March 28, 2005 presents some basic claims to vertically oriented carbon nanotubes channels connected to a bit line. Claim 1 reads:
1. An integrated circuit device, comprising:
a substrate;
an electrically conductive bit line on said substrate; and
a field effect transistor having a first current carrying terminal electrically connected to said bit line, said field effect transistor comprising a nanotube channel region and a gate electrode surrounding the nanotube channel region.
However, some examples of pertinent prior art seem to have been overlooked such as US Patent 6,515,325 which teaches forming a carbon nanotube transistor with an annular gate as part of a memory cell (see column 7, lines 5-17) or US Patent 6,740,910 which teaches a vertical nanotube channel formed in a through hole of a gate structure.
This patent from Samsung with priority going back to March 28, 2005 presents some basic claims to vertically oriented carbon nanotubes channels connected to a bit line. Claim 1 reads:
1. An integrated circuit device, comprising:
a substrate;
an electrically conductive bit line on said substrate; and
a field effect transistor having a first current carrying terminal electrically connected to said bit line, said field effect transistor comprising a nanotube channel region and a gate electrode surrounding the nanotube channel region.
However, some examples of pertinent prior art seem to have been overlooked such as US Patent 6,515,325 which teaches forming a carbon nanotube transistor with an annular gate as part of a memory cell (see column 7, lines 5-17) or US Patent 6,740,910 which teaches a vertical nanotube channel formed in a through hole of a gate structure.
Labels: Samsung
<< Home