US Patent 7354788 - Scanning probe memory formed by dual wafer manufacture
http://www.freepatentsonline.com/7354788.html
Scanning probe microscopy techniques have allowed for nanoscale inspection and characterization in the past decades and have gradually been applied to spin-off applications in nano-lithography and high density memory such as IBM's use of 1,024 probe tips for a high density memory. This patent from Intel is along similar lines and teaches segmenting CMOS circuitry from the MEMS-based scanning probe structures to provide for easier fabrication. Claim 1 reads:
1. A method comprising: fabricating microelectromechanical (MEMS) structures of a Seek and Scan Probe (SSP) memory device on a first wafer; and fabricating CMOS and memory medium components of the SSP memory device on a second wafer.
Scanning probe microscopy techniques have allowed for nanoscale inspection and characterization in the past decades and have gradually been applied to spin-off applications in nano-lithography and high density memory such as IBM's use of 1,024 probe tips for a high density memory. This patent from Intel is along similar lines and teaches segmenting CMOS circuitry from the MEMS-based scanning probe structures to provide for easier fabrication. Claim 1 reads:
1. A method comprising: fabricating microelectromechanical (MEMS) structures of a Seek and Scan Probe (SSP) memory device on a first wafer; and fabricating CMOS and memory medium components of the SSP memory device on a second wafer.
Labels: Intel
<< Home