US Patent 7203789 - Impedance programmed logic
http://www.freepatentsonline.com/7203789.html
Conventionally binary logic values are stored in electronic devices using electrical charge. This patent from HP is one of a series of patents devoted to the use of high or low impedance (resistance) states to store digital data. This is particularly interesting to programmable logic design (FPGAs, etc.) since it enables reprogramming of logic structures using a simple structure that can be scaled down to the nanoscale. It is possible that extensions of this type of electronics could have some impact on machine learning and artificial intelligence since it allows for components of computer hardware (such as electrical resistance) to be altered not just in the design stage but as the hardware is used allowing for a new type of learning in electronic systems beyond the software stage. Claim 1 reads:
1. An architecture for computing, comprising: nanometer scale crossbar switches configured to perform a logical function in response to a sequence of pulses that encode logic values in the nanometer scale crossbar switches as impedances, wherein input data is latched at input latches within the nanometer scale crossbar switches and wire-AND junctions are open/closed with the result being driven out of an output latch.
Conventionally binary logic values are stored in electronic devices using electrical charge. This patent from HP is one of a series of patents devoted to the use of high or low impedance (resistance) states to store digital data. This is particularly interesting to programmable logic design (FPGAs, etc.) since it enables reprogramming of logic structures using a simple structure that can be scaled down to the nanoscale. It is possible that extensions of this type of electronics could have some impact on machine learning and artificial intelligence since it allows for components of computer hardware (such as electrical resistance) to be altered not just in the design stage but as the hardware is used allowing for a new type of learning in electronic systems beyond the software stage. Claim 1 reads:
1. An architecture for computing, comprising: nanometer scale crossbar switches configured to perform a logical function in response to a sequence of pulses that encode logic values in the nanometer scale crossbar switches as impedances, wherein input data is latched at input latches within the nanometer scale crossbar switches and wire-AND junctions are open/closed with the result being driven out of an output latch.
Labels: Hewlett Packard
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