Sunday, November 12, 2006

US Patent 7132714 - Vertical Nanotube Transistor

Nanotube channel FETs have been suggested and experimented with for a while now but one of the key problems is in mass producing large arrays of transistors based on nanotubes. Positioning of individual nanotubes using such tools as AFMs is too time consuming to be practical. Currently there is consideration of insitu growth of vertical arrays of nanotubes using techniques more well established for mass production such as CVD. This patent from Samsung provides a teaching of such a structure. Claim 1 reads:

1. A carbon nanotube (CNT) field effect transistor comprising: a first electrode formed on a substrate; a CNT aligned vertically with respect to the first electrode; a second electrode overlying the CNT; a first buried layer overlying the first electrode; a second buried layer that is separated by a predetermined distance from the first buried layer and underlies the second electrode; a gate insulating layer formed along a portion of the CNT exposed between the first and second buried layers; and a gate enclosing the gate insulating layer between the first and second buried layers.