US Patent 8206803 - Nanocrystal HDD

http://www.freepatentsonline.com/8206803.html

Commercial HDDs (hard disk drives) typically use magnetic disks to store information but it is difficult to achieve recording densities higher than 500 Gb per square inch. This patent from Seagate teaches using a disk formed from a nanocrystal layer sandwiched between insulating layers to trap charge and obtain recording densities of greater than 1 Tb per square inch. Claim 1 reads:

1. An information storage medium comprising:

a conductive layer;

a first insulating layer formed on a surface of the conductive layer;

a nanocrystal layer that is formed on the first insulating layer and comprises conductive nanocrystal particles; and

a second insulating layer formed on the nanocrystal layer,

wherein the conductive nanocrystal particles are configured to trap electrons that tunnel through the second insulating layer and thereby record information.

US Patent 7944781 - Flexible waveguide including nanoparticles

http://www.freepatentsonline.com/7944781.html

This patent teaches a flexible waveguide for optical recording systems in which nanoparticles are used to improve the areal density of data storage. Claim 1 reads:

1. A flexible waveguide, comprising:

a core layer having a core material with a first index of refraction; and

a plurality of nanoparticles contained in the core layer, each of the nanoparticles having a second index of refraction that is greater than the first index of refraction of the core material.

US Patent 7750386 - Nanoporous mem-resistor

http://www.freepatentsonline.com/7750386.html

This patent from Seagate Technology teaches a variation of mem-resistor memory (i.e. RRAM) in which a nanoporous layer is used to reduce the magnitue or the switching current used to change resistance states. Claim 1 reads:

1. A memory cell comprising:

a first contact having a first surface and an opposing second surface;

a second contact having a first surface and an opposing second surface;

a memory material layer having a first surface and an opposing second surface; and

a nanoporous layer having a first surface and an opposing second surface, the nanoporous layer comprising at least one nanopore and dielectric material, the at least one nanopore being substantially filled with a conductive metal,

wherein the first surface of the nanoporous layer is in contact with a surface of the first contact or the second contact and the opposing second surface of the nanoporous layer is in contact with a surface of the memory material layer.

US Patent 7449256 - Surfactant coated nanoparticle memory

http://www.freepatentsonline.com/7449256.html

This patent from Seagate Technology teaches a new type of ultrahigh density memory storage using the surface tension of coated magnetic nanoparticles to produce the 0 and 1 bit states.

1. A system, comprising:

a recording medium including a substrate and having adjacent said substrate both a surfactant coated nanoparticle and a non-surfactant coated nanoparticle, wherein said surfactant coated nanoparticle and said non-surfactant coated nanoparticle are magnetic, said surfactant coated nanoparticle representing a first bit of recorded information and said non-surfactant coated nanoparticle representing a second bit of recorded information;

a write element adjacent said recording medium; and a read element adjacent said recording medium.

US Patent 7323387 - Sub-25 nm fabrication using side walls

http://www.freepatentsonline.com/7323387.html

Forming lateral dimensions below 25 nm on a semiconductor substrate is a difficult problem for conventional mask based lithography. However, creating a thin film with a thickness below 25 nm is much easier using physical or chemical deposition processes. This patent from Seagate takes advantage of this distinction by deposition on side walls to establish lateral features of less than 25 nm resolution. Claim 1 reads:

1. A method of making a nano structure smaller than 25 nanometers, the method comprising: depositing a nano film onto horizontal and vertical surfaces of a substrate using an atomic layer deposition process; forming a dielectric layer on top of the nano film; and planarizing the dielectric layer and the nano film so that the nano film is positioned between surfaces of the substrate and the dielectric layer and has a top surface with a width of about 25 nanometers or less; and forming a nano trench by etching the nano film positioned between vertical surfaces of the substrate and the dielectric layer.