US Patent 7847325 - Discrete trap memory mediated by fullerenes
http://www.freepatentsonline.com/7847325.html
There have been a variety of proposals over the past several years for using nanocrystals in the trap oxide of floating gate memory cells to enhance the scalability and reliability of Flash memory. This patent from Infineon Technology teaches a variation of this concept which instead uses fullerenes such as C60 to control the density and distribution of charge traps. Claim 1 reads:
1. A method for manufacturing a memory device, comprising:
arranging a plurality of Fullerenes on an oxide layer to form a mask, wherein the oxide layer is exposed through the mask at gaps between the plurality of Fullerenes;
depositing nano-crystals over the mask; and
trapping the nano-crystals in gaps between the plurality of Fullerenes.
There have been a variety of proposals over the past several years for using nanocrystals in the trap oxide of floating gate memory cells to enhance the scalability and reliability of Flash memory. This patent from Infineon Technology teaches a variation of this concept which instead uses fullerenes such as C60 to control the density and distribution of charge traps. Claim 1 reads:
1. A method for manufacturing a memory device, comprising:
arranging a plurality of Fullerenes on an oxide layer to form a mask, wherein the oxide layer is exposed through the mask at gaps between the plurality of Fullerenes;
depositing nano-crystals over the mask; and
trapping the nano-crystals in gaps between the plurality of Fullerenes.
Labels: Infineon technologies
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