Thursday, September 09, 2010

US Patent 7791108 - Nanowire tunneling transistor

Conventional MOSFET devices are based on the formation of a semiconductor channel having a length and width that determines the transistor behavior. Usually the channel is defined in a substrate having opposite  doping than the source and drain regions (e.g. n-type vs. p-type) but this requires careful control of doping that is very difficult at the nanoscale. This patent from NXP B.V. teaches a type of semiconductor nanowire channel design with low channel (nanowire) doping and highly doped source and drain regions forming Schottky-type barriers in a design which may be easier to fabricate at nanoscale dimensions. Claim 1 reads:    

1. Transistor comprising a nanowire having a source and a drain separated by an intrinsic or lowly doped region,

wherein a potential barrier is formed at the interface of the intrinsic or lowly doped region and one of the source and the drain,

wherein a gate electrode is provided in the vicinity of the potential barrier such that the effective height and/or width of the potential barrier can be modulated by applying an appropriate voltage to the gate electrode.