Tuesday, February 09, 2010

US Patent 7659631 - Microscale to nanoscale electronic interconnect


There have been a variety of suggestions to integrate nanoelectronic circuit architectures based on crossbars with microelectronic circuit architectures based on CMOS. However, due to differences in the pitch and wiring dimensions this is not an easy task. This patent represents one solution proposed by HP using a tapered electrical interconnect. Claim 1 reads:

1. A hybrid-scale electronic circuit comprising:

a nanoelectronic circuit having a nano-scale electrical contact;

a microelectronic circuit having a micro-scale electrical contact; and

an interconnect extending through an insulator layer that separates the nanoelectronic circuit and the microelectronic circuit, the interconnect having a tapered shape, such that a first end of the interconnect has an end dimension that is at least five times larger than an end dimension of a second end of the interconnect, the first end connecting to the micro-scale electrical contact and the second end connecting to the nano-scale electrical contact.