US Patent 7425715 - Digital e-beam lithography stamp
http://www.freepatentsonline.com/7425715.html
Electron beam lithography is capable of nanometer scale resolution but typically uses a single beam to pattern and is thus too slow for use in mass production of semiconductor devices. This patent teaches a large array of electron generating nanotips controlled to generate a digital lithographic pattern for a higher throughput. Claim 1 reads:
1. A Digital Parallel Electron Beam Lithography Stamp (PEBLS) apparatus comprising:
a substrate with a first side and a second side;
a first array of parallel wires oriented in a first direction formed on the first side of the substrate;
an array of lithographic nanotips capable of electron emission formed above the first wires and oriented substantially normal to the first side of the substrate;
a second array of parallel wires formed above the array of lithographic nanotips and oriented in a second direction at an angle crossing with the first direction, wherein electron emission regions are formed between the wires in the array of second parallel wires;
a control unit arranged to selectively address the electron emission regions in order to generate a lithographic pattern with the array of nanotips;
a cell that forms an enclosing space on the first side of the substrate around the lithographic nanotips; and
a target to which the lithographic pattern is transferred.
Electron beam lithography is capable of nanometer scale resolution but typically uses a single beam to pattern and is thus too slow for use in mass production of semiconductor devices. This patent teaches a large array of electron generating nanotips controlled to generate a digital lithographic pattern for a higher throughput. Claim 1 reads:
1. A Digital Parallel Electron Beam Lithography Stamp (PEBLS) apparatus comprising:
a substrate with a first side and a second side;
a first array of parallel wires oriented in a first direction formed on the first side of the substrate;
an array of lithographic nanotips capable of electron emission formed above the first wires and oriented substantially normal to the first side of the substrate;
a second array of parallel wires formed above the array of lithographic nanotips and oriented in a second direction at an angle crossing with the first direction, wherein electron emission regions are formed between the wires in the array of second parallel wires;
a control unit arranged to selectively address the electron emission regions in order to generate a lithographic pattern with the array of nanotips;
a cell that forms an enclosing space on the first side of the substrate around the lithographic nanotips; and
a target to which the lithographic pattern is transferred.
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