Thursday, May 15, 2008

US Patent 7371674 - Nanowire template interconnect

In order to grow parallel arrays of vertical nanowires or nanotubes from a substrate one popular method is the use of nanoporous alumina templates. This technique has been applied to form well-ordered dense arrays of carbon nanotube field emitters for displays as will as a variety of sensor structures. This patent from Intel teaches using such templates to form interconnect wiring for IC packaging. Claim 1 reads:

1. A method comprising:

forming a nanostructure bump on a die, the nanostructure bump having a template defining nano-sized openings and metallic nano-wires grown from the nano-sized openings; and

attaching the die to a substrate via the nanostructure bump.