Thursday, February 14, 2008

US Patent 7329555 - Selective interconnection to MEMS device during fabrication

Integration of the fabrication processes for CMOS and MEMS can allow for an increase in economies of scale and a reduction in overall device sizes. However, the chip area necessary for control circuits is often much less than the chip area required for the MEMS portions leading to a size mismatch during integration that wastes chip area. This patent from National Semiconductor teaches a solution of selective interconnection at the end of a fabrication cycle. Claim 1 reads:

1. A method of forming a semiconductor structure, the semiconductor structure including an integrated circuit and a MEMS device, the integrated circuit including a number of MEMS support circuits, the MEMS device including two or more MEMS sensors, the method comprising electrically connecting the integrated circuit to the MEMS device so that only one MEMS sensor of the two or more MEMS sensors is connected to the integrated circuit after the integrated circuit has been completely connected to the MEMS device.