US Patent 7576353 - Ballistic deflection transistor
http://www.freepatentsonline.com/7576353.html
This patent from researchers at the University of Rochester teaches a new type of transistor based on ballistic transport enabling ultra-high speed (THz) and low power logic circuit designs. An article from the University of Rochester explains that:
"Since there are no conventional junctions, the operating voltage is very low, making it suitable for low power applications. The projected power usage is expected to be 10% of conventional designs. Unlike conventional designs, this design will improve with reduced scale fabrication processes by using even less power and becoming more accurate with a better signal to noise ratio. The ultra-high speed capability will enable new approaches to telecommunications and computing."
1. A ballistic deflection transistor comprising:
a substrate;
a quantum well formed in the substrate;
a plurality of paths in the substrate to define a hub and a plurality of ports extending from the hub;
a deflective structure formed in the hub; and
a plurality of gates formed in the substrate to be adjacent to one of the ports to apply a capacitive or inductive field to electrons entering at said one of the ports.
This patent from researchers at the University of Rochester teaches a new type of transistor based on ballistic transport enabling ultra-high speed (THz) and low power logic circuit designs. An article from the University of Rochester explains that:
"Since there are no conventional junctions, the operating voltage is very low, making it suitable for low power applications. The projected power usage is expected to be 10% of conventional designs. Unlike conventional designs, this design will improve with reduced scale fabrication processes by using even less power and becoming more accurate with a better signal to noise ratio. The ultra-high speed capability will enable new approaches to telecommunications and computing."
1. A ballistic deflection transistor comprising:
a substrate;
a quantum well formed in the substrate;
a plurality of paths in the substrate to define a hub and a plurality of ports extending from the hub;
a deflective structure formed in the hub; and
a plurality of gates formed in the substrate to be adjacent to one of the ports to apply a capacitive or inductive field to electrons entering at said one of the ports.
Labels: University of Rochester
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