US Patent 7312155 - Transistor manufucture by etching nanowire electrodes
http://www.freepatentsonline.com/7312155.html
There are quite a few proposed designs for using nanowires and nanotubes to form transistors. Companies such as Infineon and Samsung have focused on vertical transitor designs using nanowires or nanotubes, Hewlett Packard is forming crossbar architectures with doped nanowires, and Nanosys is using arrays of aligned nanowires to form FETs. This patent from Intel includes some broad claims to an approach that avoids alignment problems when different nanowires are used for the source and drain of a transistor by using a single nanowire which is etched to form a gap for the control electrode. Claim 1 reads:
1. A method comprising: etching a gap along the length of a nano-electrode to form a transistor.
There are quite a few proposed designs for using nanowires and nanotubes to form transistors. Companies such as Infineon and Samsung have focused on vertical transitor designs using nanowires or nanotubes, Hewlett Packard is forming crossbar architectures with doped nanowires, and Nanosys is using arrays of aligned nanowires to form FETs. This patent from Intel includes some broad claims to an approach that avoids alignment problems when different nanowires are used for the source and drain of a transistor by using a single nanowire which is etched to form a gap for the control electrode. Claim 1 reads:
1. A method comprising: etching a gap along the length of a nano-electrode to form a transistor.
Labels: Intel
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