Currently their is a lot of interest in crossbar switching networks as architectures to achieve molecular electronic devices. The advantages of such crossbar architectures is that:
a) Crossbars have simple, periodic structures that are scalable to nanometer dimension and are subject to mass production on the nanoscale
using techniques such as nanoimprint
lithography and self-assembly.
b) Crossbars are becoming an integral component to high density memory devices using thin film materials such as chalcogenides
, etc. with various programmable electronic properties to form MRAM
, and other upcoming memory devices. The technologies developed to read and write data to such crossbar memories may be extended to read/write data to other crossbar electronic devices such as arithmetic processors.
c) Crossbars are also becoming an important component in programmable logic architectures since they allow for high density switching arrays to be formed. These architectures allow for reconfiguration and self-repair providing for more adaptable electronic devices and provide a bridge between application specific integrated circuits and general purpose processors.
Currently Hewlett-Packard and Nantero
are the two companies most active in crossbar nanoelectronic
designs with HP forming the crossbars by sandwiching rotaxane
-based molecular films between crossing nanowires
using carbon nanotube
ribbons as the crossbar switches. Both of these companies are using the crossbars to replicate basic logic functions to build arithmetic circuitry
(see for example http://www.freepatentsonline.com/7203789.html
However, replicating logic devices may not be the optimum route to the use of such crossbar arrays. While logic gates have played their part very well in the history of computation they may not be the optimum architectures from which to build future generations of computational systems. For example, addition circuitry may be constructed from logic gates but multiplication, division, and other computational processes are more difficult and conventional computation simply resorts to repeated addition or subtraction to perform multiplication and addition which ultimately slows down processing time.
I currently have a patent pending for one such alternative which combines crossbar switching circuitry (not necessarily nanoscale
) with other analog and digital circuitry to achieve a more efficient computational system. The patent application is currently available for public review at the following web site:http://www.peertopatent.org/patent/20070233761/activity
Labels: crossbar arithmetic processor